In spite of reduction in supply voltage and improved leakage control, power consumption has become a key performance specification/target in many electronic products – not just portable electronics. Reducing power consumption requires a broad multi-dimensional approach: system power management; energy efficient regulation; architectural optimization; on-die power management; BIG-Little processors; low-power implementation techniques (clock and power gating, multi-Vt, multi-channel libraries, leakage and dynamic power optimization), sleep modes, etc.
Are there any new concepts that offer the promise of even more significant power reduction? Is low Power design best handled by experienced designers or can CAD/CAD optimization tools create improved power-friendly designs? Are wafer foundries doing enough to enable low-power design through leakage control process control, etc.? And is the headroom running out on analog with elevated power densities in new processes and electrical effects squeezing traditional analog design?
The SMC of ITAC has convened a faculty of experts to explore power reduction and design in analog systems.
Gordon Roberts, Professor at McGill University, Montreal, QC
Martin Snelgrove, CEO at Kapik Integration, Toronto, ON
Thursday, March 14
5:30 - 8:30pm (Registration fee covers the cost of dinner)
3480 University Street
Room 603, McConnell Engineering Building,
ITAC Members - $45.00 + GST + QST
ITAC Non-Members - $65.00 + GST + QST
(Registration fee covers the cost of dinner)
So, please join us to gain better insight into a complex subject and to enjoy valuable networking time with your colleagues in an informal sharing of best industry practices.
For more information contact Micheline Lepage at (613) 238-4822 x 2245 or via email at email@example.com