65 and 45nm Design Challenges: Is First Time Success a Thing of the Past?
The participants will share their “war stories”, both good and bad, about designing into leading-edge/bleeding-edge process nodes.
Cormac, O’Connell, a representative from TSMC, the largest foundry in the world, will describe the latest process technologies as well as the improved design environments available to ensure first-time success.
Tomasz Wojcicki, VP Engineering, Sidense will share his real world experiences from a user’s viewpoint and all participanats will share of their own company’s experiences to provide a note of real-world caution.
Please join us in Ottawa to gain better insight into a complex subject and enjoy valuable networking time with your colleagues in an informal sharing of best industry practices.
So please register now to join us in Ottawa on September 15th to gain better insight into a complex subject and enjoy valuable networking time with your colleagues in an informal sharing of best industry practices.
Special thanks to the Steering Committee:
· Ed Vopni, Tundra Semiconductor;
· Peter Burke, Zarlink Semiconductor; and
· David Lynch, Gennum Corp and SMC Chair.